VerifAIX Bags $5 Mn To Scale AI-Based Chip Verification Platform

AI-native semiconductor verification startup VerifAIX has raised $5 Mn (about ₹48 Cr) in a seed funding round co-led by Endiya Partners and Bluehill VC.

The round marks VerifAIX’s first institutional fundraise. The startup plans to deploy the fresh capital to accelerate product development, expand customer deployments, and grow its engineering teams across the US, India, and Israel.

It will also use the capital to advance its proprietary “Formal Brain”, scale its automated abstraction and decomposition capabilities to larger chip designs, and strengthen its formal verification and simulation tools.

Founded in 2024 by Madhulima Tewari, Kenneth Roe, and Avner Landver, VerifAIX is developing an AI-native platform to help semiconductor engineering teams verify chip designs.

The fundraise comes as AI is increasingly being deployed across the semiconductor design workflow, including to generate register-transfer level (RTL) code and other design and verification assets.

However, faster generation of hardware designs has also increased the need for systems that can independently establish whether these outputs conform to their original specifications.

This is the gap VerifAIX is looking to address with what it calls a “verification trust layer” for AI-driven chip design.

Inside VerifAIX’s Platform

At the centre of its platform is the Formal Brain, which creates a mathematically grounded representation of a chip design and its intended behaviour. It analyses specifications, RTL code, and verification assets to identify inconsistencies and gaps. 

Unlike tools primarily focused on using large language models to generate verification code, VerifAIX said its platform combines AI-based reasoning with deterministic and mathematically rigorous verification.

Its AI agents cover multiple stages of the verification process, including specification analysis, verification planning, testbench generation, formal analysis, simulation, coverage, and debugging. 

The platform also flags gaps and potential errors in specifications and recommends fixes. 

“AI is changing how semiconductor designs are created, but generating a design is not the same as proving that it is correct,” Tewari, CEO of VerifAIX, said.

She added that the startup plans to build an independent verification layer that can establish the correctness of AI-generated designs while maintaining traceability to the original design intent.

The startup is targeting semiconductor and chip IP companies, processor and AI accelerator developers, hyperscalers, and other custom-silicon developers. It views EDA vendors as partners rather than customers.

India’s Growing Chip Ecosystem 

The development comes amid growing investor and policy interest in India’s semiconductor ecosystem, particularly across chip design, testing, and specialised components.

Earlier this year, semiconductor startup HrdWyr raised $13 Mn to accelerate the development of its AI-native system-on-chip products and expand its global customer engagements.

Meanwhile, the ecosystem has also begun producing exits. Last month, German semiconductor major Infineon agreed to acquire Peak XV-backed C2i Semiconductors for an undisclosed amount. The two-year-old startup builds power-management solutions for AI data centres and cloud infrastructure.

The acquisition came months after C2i closed its Series A funding round at $16.7 Mn (₹160.5 Cr), led by Peak XV Partners, with participation from TDK Ventures and existing investor Yali Capital.

On the policy front, the Union Cabinet recently cleared the second phase of the India Semiconductor Mission, Semicon 2.0, with an outlay of ₹1.28 Lakh Cr to strengthen the country’s chip design and manufacturing ecosystem.

At the heart of this push is India’s semiconductor market, which is projected to grow from about $62 Bn in 2026 to $155 Bn by 2031, driven by domestic demand, policy support, and global supply-chain diversification.

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